1. Field of the Invention
The present invention relates to a thin film semiconductor device in which a plurality of thin film semiconductors are formed on a substrate having an insulating surface, which can be applied to a liquid crystal display device and the like.
2. Description of Related Art
An active matrix liquid crystal display device is known as one of devices employing a number of thin film transistors using thin film semiconductors. The active matrix liquid crystal display device is also referred to as what is called an AMLCD (Active Matrix Liquid Crystal Display), and is classified into some types according to the materials of the thin film transistors or the structure of the transistors. Since the thin film transistor is also referred to as what is called a TFT (Thin Film Transistor), the AMLCD is also referred to as a TFT liquid crystal.
With respect to the materials, there are an amorphous TFT type using amorphous silicon as a main material, a high temperature polysilicon TFT type using polycrystal silicon formed through a high temperature process more than 1,000xc2x0 C. as a main material, a low temperature polysilicon TFT type using polycrystal silicon formed through a low temperature process of 600xc2x0 C. as a main material, and the like. With respect to the structure of transistors, there are a bottom-gate type in which a gate electrode is disposed at a lower side, a top-gate type in which a gate electrode is disposed at an upper side, and the like.
Although there are features in the respective materials or the structure of the transistors, in the case of the amorphous TFT, since the mobility is small and not larger than 1 cm2/Vsec, in order to form a channel forming region between a gate insulating film and an active silicon layer with proper coordination, the gate insulating film and the active silicon layer must be continuously formed, and in order to prevent hydrogen in the amorphous silicon from drawing off, the amorphous silicon can not be heated up to a high temperature over 300xc2x0 C. after formation thereof. Further, since the amorphous silicon has photosensitivity, it is desired to be as thin as possible, not larger than 300 xc3x85, so that the bottom gate type reverse stagger structure is used.
Since the amorphous TFT has large resistance at an OFF-state, an OFF-state leak current is small, so that it is most suitable for a switching transistor of a pixel. However, since the mobility thereof is small, it is impossible to form a driver circuit such as a shift register on a substrate, and an external IC using crystalline silicon is always required. Accordingly, the amorphous TFT has problems in miniaturization and lowering the cost.
With respect to the high temperature TFT, since a high temperature process over 1,000xc2x0 C. can be carried out, steps similar to so-called crystalline silicon can be used. Thus, a very stable process can be conducted and also the mobility thereof is about 100 cm2/Vsec, a driver circuit can be formed on a substrate. However, as a substrate capable of being used at a high temperature of 1,000xc2x0 C., a substrate other than an expensive substrate such as quartz can not be used, so that the enlargement of the substrate is difficult, and the application of the high temperature TFT is restricted to a view finder with a diagonal of at most two inches or the like.
The low temperature polysilicon can be formed with the merits of both the amorphous TFT and the high temperature polysilicon TFT, and it has superior properties, that is, a TFT having a high mobility can be formed on a low cost normal glass substrate. Accordingly, it is also possible to form a driver circuit on the substrate and at the same time, to form a switching transistor for a liquid crystal pixel.
However, when the low temperature polysilicon is formed, in a step of crystallizing the amorphous silicon formed on the glass substrate, it is known by experiment that when the amorphous silicon film is thin, it can not be crystallized by the formation through low temperature thermal anneal of not larger than 600xc2x0 C. Particularly, when the film thickness is not larger than 300 xc3x85, the film can be hardly crystallized. Also in the case of the low temperature polysilicon, it becomes difficult to lower an OFF-state leak current at an OFF-state if the film thickness of silicon is not made thin, so that the thickness is desired to be as thin as possible. Although the silicon film with a thickness of not less than 300 xc3x85 can be used as a driver circuit or the like by using an LDD structure, it is preferable that the thickness is not larger than 300 xc3x85 in order to use the silicon film as a switching transistor for a pixel. In the case where the amorphous silicon with a thickness of not larger than 300 xc3x85 is crystallized, laser crystallization using a laser of a wavelength of not larger than 400 nm, such as an excimer laser, is effective. Crystallization is possible even for a film thickness of not larger than 300 xc3x85 by crystallization using a laser, and the laser crystallization is considerably used as a method of manufacturing a low temperature polysilicon TFT.
However, although crystallization by a laser is industrially possible when the substrate is small, when the substrate becomes large, crystallization of the entire surface of the substrate by a laser takes an extremely long time so that laser crystallization is not appropriate from the industrial standpoint. Further, since there is no laser device capable of annealing a large substrate at once, the entire of the substrate is crystallized by repeating partial laser crystallization. Accordingly, irregularity of laser irradiation directly causes irregularity of characteristics of TFTs.
It is therefore an object of the present invention to provide a thin film semiconductor device which combines only merits of an amorphous silicon TFT and a polysilicon TFT by using a TFT of a low temperature polysilicon using laser crystallization or the like as a driving circuit, and an amorphous silicon transistor as a switching transistor for a liquid crystal pixel, so that a thin film semiconductor unit having switching characteristics of a small OFF-state current and an ON/OFF ratio of not less than five figures is provided for the pixel, and a thin film semiconductor unit having high mobility is provided for a driver to integrate the driving circuit on a substrate.
In order to achieve the above object, according to the present invention, a thin film semiconductor device comprising a substrate having an insulating surface, gate electrodes disposed on said insulating surface, gate insulating films disposed on upper portions of said gate electrodes, and thin film semiconductors disposed on said gate insulating films and including channel forming regions, source regions and drain regions,
wherein one of said gate electrodes has a first area being contact with said substrate and a second area being contact with said gate insulating film, said first area being larger than said second area, and
wherein a plurality of thin film semiconductor units are disposed on said substrate, said plurality of semiconductor units comprising:
a first thin film semiconductor unit including said thin film semiconductor of polycrystal, an insulating film covering an upper portion of said channel forming region in said polycrystal thin film semiconductor, impurity semiconductor films doped with trivalent or pentavalent impurities and covering said source region and said drain region in said polycrystal thin film semiconductor, and conductive films disposed on said impurity semiconductor films, said impurity semiconductor films and said conductive films extending to said insulating film on said channel region, and being equal to each other in plane shape; and
a second thin film semiconductor unit including said thin film semiconductor of amorphous, an insulating film covering said channel region in said amorphous thin film semiconductor, impurity semiconductor films doped with trivalent or pentavalent impurities and covering said source region and said drain region in said amorphous thin film semiconductor, and conductive films disposed on said impurity semiconductor films, said impurity semiconductor films and said conductive films extending to said insulating film on said channel region, and being equal to each other in plane shape.
Further, according to the present invention, a thin film semiconductor device comprising a substrate having an insulating surface, gate electrodes disposed on said insulating surface, gate insulating films disposed on upper portions of said gate electrodes, and thin film semiconductors disposed on said gate insulating films and including channel forming regions, source regions and drain regions,
wherein one of said gate electrodes has a first area being contact with said substrate and a second area being contact with said gate insulating film, said first area being larger than said second area,
wherein a plurality of thin film semiconductor units are disposed on said semiconductor, said plurality of semiconductor units comprising:
a first semiconductor unit including said thin film semiconductor of polycrystal, said channel forming region in said polycrystal thin film semiconductor having a thickness thinner than that of said source region and said drain region in said polycrystal thin film semiconductor, impurity semiconductor films doped with trivalent or pentavalent impurities and covering said source region and said drain region, and conductive films disposed on said impurity semiconductor films, said impurity semiconductor films and said conductive films being equal to each other in plane shape; and
a second semiconductor unit including said thin film semiconductor of amorphous, said channel forming region in said amorphous thin film semiconductor having a thickness thinner than that of said source region and said drain region in said amorphous thin film semiconductor, impurity semiconductor films doped with trivalent or pentavalent impurities and covering said source region and said drain region, and conductive films disposed on said impurity semiconductor films, said impurity semiconductor films and said conductive films being equal to each other in plane shape.
Still further, a thin film semiconductor device comprising a substrate having an insulating surface, gate electrodes disposed on said insulating surface, gate insulating films disposed on upper portions of said gate electrodes, and thin film semiconductors disposed on said gate insulating films and having channel forming regions, source regions and drain regions,
wherein one of said gate electrodes has a first area being contact with said substrate and a second area being contact with said gate insulating film said first area being larger than said second area, and
wherein a plurality of thin film semiconductor units are disposed on said substrate, said plurality of semiconductor units comprising:
a first thin film semiconductor unit including said thin film semiconductor of polycrystal, an insulating film covering an upper portion of said channel region in said polycrystal thin film semiconductor, regions doped with trivalent or pentavalent impurities in said source region and said drain region in said polycrystal thin film semiconductor, and conductive films disposed on said regions doped with said impurities, said conductive films extending to said insulating film on said channel region; and
a second thin film semiconductor unit including said thin film semiconductor of amorphous, an insulating film covering an upper portion of said channel region in said amorphous thin film semiconductor, regions doped with trivalent or pentavalent impurities in said source region and drain region in said amorphous thin film semiconductor, and conductive films disposed on said regions doped with said impurities, said conductive films extending to said insulating film on said channel region.
Still further, a thin film semiconductor device comprising a substrate having an insulating surface, gate electrodes disposed on said insulating surface, gate insulating films disposed on upper portions of said gate electrodes, and thin film semiconductors disposed on said gate insulating films and having channel forming regions, source regions and drain regions,
wherein one of said gate electrodes has a first area being contact with said substrate and a second area being contact with said gate insulating film said first area being larger than said second area, and
wherein a plurality of thin film semiconductor units are disposed on said substrate, said plurality of semiconductor units comprising:
a first thin film semiconductor unit including said thin film semiconductor of polycrystal, said thin film semiconductor composed of a channel region, a drain region, a source region, a lightly doped source region, and a lightly doped drain region, a first insulating film covering said channel region, said lightly doped source region, and said lightly doped drain region, a second insulating region on said first insulating film and over said channel region, and regions doped with trivalent or pentavalent impurities in said source region, said drain region, said lightly doped source region, and lightly doped drain region, the dose amount of said impurities in said source region and said drain region being larger than that of said impurities of said lightly doped source region and said lightly doped drain region; and
a second thin film semiconductor unit including said thin film semiconductor of amorphous, an insulating film made of the same material as said second insulating film, having the same thickness as said second insulating film, and covering an upper portion of said channel region in said amorphous thin film semiconductor, regions doped with trivalent or pentavalent impurities in said source region and drain region in said amorphous thin film semiconductor, and conductive films disposed on said regions doped with said impurities, said conductive films extending to said insulating film on said channel region. Still further, a thin film semiconductor device comprising a substrate having an insulating surface, gate electrodes disposed on said insulating surface, gate insulating films disposed on upper portions of said gate electrodes, and thin film semiconductors disposed on said gate insulating films and having channel forming regions, source regions and drain regions,
wherein one of said gate electrodes has a first area being contact with said substrate and a second area being contact with said gate insulating film said first area being larger than said second area, and
wherein a plurality of thin film semiconductor units are disposed on said substrate, said plurality of semiconductor units comprising:
a first thin film semiconductor unit including said thin film semiconductor of polycrystal, said thin film semiconductor composed of a channel region, a drain region, a source region, a lightly doped source region, and a lightly doped drain region, a first insulating film covering said channel region, a second insulating film on said lightly doped source region, said lightly doped drain region, and said first insulating film, and regions doped with trivalent or pentavalent impurities in said source region, said drain region, said lightly doped source region, and lightly doped drain region, the dose amount of said impurities in said source region and said drain region being larger than that of said impurities of said lightly doped source region and said lightly doped drain region; and
a second thin film semiconductor unit including said thin film semiconductor of amorphous, an insulating film made of the same material as said second insulating film, having the same thickness as said second insulating film, and covering an upper portion of said channel region in said amorphous thin film semiconductor, regions doped with trivalent or pentavalent impurities in said source region and said drain region in said amorphous thin film semiconductor, and conductive films disposed on said regions doped with said impurities, said conductive films extending to said insulating film on said channel region.
Still further, a method of manufacturing a thin film semiconductor device comprising a substrate having an insulating surface, gate electrodes disposed on said insulating surface, gate insulating films disposed on upper portions of said gate electrodes, and thin film semiconductors disposed on said gate insulating films and including channel forming regions, source regions and drain regions, said method comprising the steps of:
forming a gate electrode film of metal on said substrate;
forming a gate insulating film on said gate electrode film under a low pressure;
forming an amorphous semiconductor thin film on said gate insulating film under a low pressure without exposing said gate insulating film to the atmosphere;
crystallizing a part of said amorphous semiconductor thin film without exposing said amorphous semiconductor thin film to the atmosphere;
forming an etching stopper insulating film on said semiconductor thin film without exposing said semiconductor thin film to the atmosphere;
taking out said substrate into the atmosphere;
forming an etching stopper insulating film on said channel forming region;
shaping said thin film semiconductor and said gate insulating film into a desired shape,
forming a semiconductor film containing trivalent or pentavalent impurities;
forming a conductive film on said semiconductor film; and
shaping said semiconductor film containing said impurities and said conductive film into the same plane shape;
whereby a thin film semiconductor unit in which said channel forming region is made of polycrystal, and a thin film semiconductor unit in which said channel forming region is made of amorphous, are formed on said substrate.
Still further, a method of manufacturing a thin film semiconductor device comprising a substrate having an insulating surface, a gate electrode disposed on said insulating surface, a gate insulating film disposed on an upper portion of said gate electrode, and a thin film semiconductor disposed on said gate insulating film and including a channel forming region, a source region and a drain region, said method comprising the steps of:
forming a gate electrode film of metal on said substrate;
forming a gate insulating film on said gate electrode film under a low pressure;
forming an amorphous semiconductor thin film on said gate insulating film under a low pressure without exposing said gate insulating film to the atmosphere;
crystallizing a part of said semiconductor thin film without exposing said semiconductor thin film to the atmosphere;
forming a semiconductor film containing trivalent or pentavalent impurities on said semiconductor thin film without exposing said semiconductor thin film to the atmosphere;
forming a conductive film on said semiconductor film containing said impurities without exposing said semiconductor film to the atmosphere;
taking out said substrate into the atmosphere; and
shaping said conductive film, said semiconductor film containing said impurities, and a part of said semiconductor thin film into a desired shape;
whereby a thin film semiconductor unit in which said channel forming region is made of polycrystal, and a thin film semiconductor unit in which said channel forming region is made of amorphous, are formed on said substrate.
Still further, a method of manufacturing a thin film semiconductor device comprising a substrate having an insulating surface, a gate electrode disposed on said insulating surface, a gate insulating film disposed on an upper portion of said gate electrode, and a thin film semiconductor disposed on said gate insulating film and including a channel forming region, a source region and a drain region, said method comprising the steps of:
forming a gate electrode film of metal on said substrate;
forming a gate insulating film on said gate electrode film under a low pressure;
forming an amorphous semiconductor thin film on said gate insulating film under a low pressure without exposing said gate insulating film to the atmosphere;
crystallizing a part of said semiconductor thin film without exposing said semiconductor thin film to the atmosphere;
forming an etching stopper insulating film on said semiconductor thin film without exposing said semiconductor thin film to the atmosphere;
taking out said substrate into the atmosphere;
forming an etching stopper insulating film on said channel forming region;
shaping said thin film semiconductor and said gate insulating film into a desired shape;
forming said source region and said drain region by doping of trivalent or pentavalent impurities; and
forming a conductive film on said source region and said drain region such that at least part of said conductive film is brought into contact with said source region and said drain region;
whereby a thin film semiconductor unit in which said channel forming region is made of polycrystal, and a thin film semiconductor unit in which said channel forming region is made of amorphous, are formed on said substrate.
Still further, a method of manufacturing a thin film semiconductor device comprising a substrate having an insulating surface, a gate electrode disposed on said insulating surface, a gate insulating film disposed on an upper portion of said gate electrode, and a thin film semiconductor disposed on said gate insulating film and including a channel forming region, a source region and a drain region, said method comprising the steps of:
forming a gate electrode film of metal on said substrate;
forming a gate insulating film on said gate electrode film under a low pressure;
forming an amorphous semiconductor thin film on said gate insulating film under a low pressure without exposing said gate insulating film to the atmosphere;
crystallizing a part of said semiconductor thin film without exposing said semiconductor thin film to the atmosphere;
forming a first insulating film on said semiconductor thin film without exposing said semiconductor thin film to the atmosphere;
taking out said substrate into the atmosphere;
shaping said first insulating film so that said first insulating film having an area larger than said gate electrode remains on said crystallized semiconductor thin film, and said first insulating film does not remain on said semiconductor thin film not crystallized;
forming a second insulating film having an area smaller than said gate electrode on said first insulating film on said crystallized semiconductor thin film and on said semiconductor thin film not crystallized;
forming said source region, said drain region, said lightly doped source region, and said lightly doped drain region in said crystallized semiconductor thin film, and forming said source region and said drain region in said semiconductor thin film not crystallized, by doping of trivalent or pentavalent impurities; and
recrystallizing only said crystallized semiconductor thin film;
whereby a thin film semiconductor unit in which said channel forming region is made of polycrystal, and a thin film semiconductor unit in which said channel forming region is made of amorphous, are formed on said substrate.
Still further, a method of manufacturing a thin film semiconductor device comprising a substrate having an insulating surface, a gate electrode disposed on said insulating surface, a gate insulating film disposed on an upper portion of said gate electrode, and a thin film semiconductor disposed on said gate insulating film and including a channel forming region, a source region and a drain region, said method comprising the steps of:
forming a gate electrode film of metal on said substrate;
forming a gate insulating film on said gate electrode film under a low pressure;
forming an amorphous semiconductor thin film on said gate insulating film under a low pressure without exposing said gate insulating film to the atmosphere;
crystallizing a part of said semiconductor thin film without exposing said semiconductor thin film to the atmosphere;
forming a first insulating film on said semiconductor thin film without exposing said semiconductor thin film to the atmosphere;
taking out said substrate into the atmosphere;
shaping said first insulating film so that said first insulating film having an area smaller than said gate electrode remains on said crystallized semiconductor thin film, and said first insulating film covers all of said channel forming region, said drain region, and said source region on said semiconductor thin film not crystallized;
conducting light doping of trivalent or pentavalent impurities so that a region not covered with said first insulating film is lightly doped, and said semiconductor thin film not crystallized is hardly doped;
recrystallizing only said crystallized semiconductor thin film;
forming a second insulating film having an area larger than said gate electrode on said first insulating film on said crystallized semiconductor thin film and forming said second insulating film having an area smaller than said gate electrode on said semiconductor thin film not crystallized;
forming said source region, said drain region, said lightly doped source region, and said lightly doped drain region in said crystallized semiconductor thin film, and forming said source region and said drain region in said semiconductor thin film not crystallized, by doping of trivalent or pentavalent impurities; and
recrystallizing only said crystallized semiconductor thin film;
whereby a thin film semiconductor unit in which said channel forming region is made of polycrystal, and a thin film semiconductor unit in which said channel forming region is made of amorphous, are formed on said substrate.
In order to form polycrystal silicon (polysilicon) transistors and noncrystal silicon (amorphous silicon) transistors on the same substrate, a bottom gate type and reverse stagger type structure is adopted in the present invention. The reason is as follows. That is, particularly in the case of an amorphous silicon TFT, since an interface between a gate insulating film and an amorphous silicon as an active layer becomes a channel, it is continuously formed and the gate insulating film is formed at a temperature as high as possible to form a dense film. Thus, if the amorphous silicon is formed before the gate insulating film is formed, hydrogen in the amorphous silicon is drawn off, so that the function as a semiconductor is lost. Accordingly, the gate insulating film is formed at a high temperature in advance, and then the amorphous silicon as an active layer is formed.
As a gate electrode, any film may be used as long as it is a metal film. In the present invention, Al, Ta, Cr, Mo, or alloy containing the former metal as a main component is used. As a film forming method, magnetron sputtering, electron beam evaporation, or resistor heating evaporation is used. In view of heat resistance at subsequent laser crystallization, and to prevent short circuit between a source or drain and a gate, it is effective to cover the gate electrode with a dense oxide film by anodic oxidation of the metal as mentioned above. The shape of the gate electrode greatly affects subsequent processes. Especially, since the film thickness of silicon is thin, the edge of the gate electrode is required to be taper-shaped, and it is necessary to form such a taper shape that an area of the gate electrode being contact with the gate insulating film is smaller than an area of the gate electrode being contact with the substrate.
In the case where Al is used for the metal film, by application of heat of not lower than 200xc2x0 C. at a subsequent film formation of the gate insulating film or the like, hillocks are sometimes produced. The generation of hillocks can be prevented by forming a film of Al mixed with Si or Sc of 0.1 to 2% as impurities, or by performing high vacuum aluminum film formation under a pressure of not larger than 10xe2x88x927 Torr by evacuation before formation of an Al film. Although the film thickness is also dependent on a resistance value, it is necessary to make such a thickness that the sheet resistance becomes about 10xcexa9/xc2x7 or less.
After forming the gate electrode of only a metal film or a metal film covered with an anodic oxidation film, an insulating film as a gate insulating film is formed. As the insulating film, a single layer or multilayer of silicon oxide, silicon nitride, silicon nitride oxide is formed. As a film forming method, reactive sputtering, plasma CVD, low pressure CVD, or the like is used. Since the insulating film is used as the gate insulating film, it is necessary to make the film dense by forming the film at a temperature as high as possible.
As the gate insulating film used for an amorphous TFT for switching a liquid crystal pixel, it has been found by experiment that a nitride film is superior in coordination to an oxide film. Accordingly, as the gate insulating film, a single layer of nitride film or multilayer structure in which only a layer being contact with the amorphous silicon is a nitride film, is good as the structure. Although the film thickness of the gate insulating film is dependent on the dielectric constant, the thickness of about 1,000 to 3,000 xc3x85 is required.
After forming the gate insulating film, amorphous silicon to be formed into an active layer is formed without exposing the surface thereof to the atmosphere. As a method of forming the amorphous silicon, plasma CVD method, sputtering method, low pressure CVD method, or the like is used. Although the amorphous silicon can be formed in the same reactive chamber as that where the gate insulating film has been formed, in view of the contamination of an interface between the gate insulating film to be made into the channel formation region and the amorphous silicon film, it is desirable to form the amorphous silicon in a different reactive chamber. Although it is preferable that the film thickness is as thin as possible, the thickness of not smaller than 100 xc3x85 is required in view of subsequent crystallization, and in view of OFF-state leak current of a TFT, the thickness is preferably not larger than 300 xc3x85. Accordingly, the thickness is selected within the range of 100 to 300 xc3x85.
After forming the amorphous silicon, to form a driving circuit or the like on the substrate, it is necessary to crystallize only a portion where polysilicon is subsequently required. In the substrate where the amorphous silicon has been formed, portions where driver circuits for driving liquid crystal are two portions, in the lengthwise and widthwise directions, of the end of the substrate. In order to crystallize those portions, laser crystallization by scanning only those portions with a laser beam, or lamp annealing to only those portions is carried out.
In the case of crystallization by a laser, since the amorphous silicon film is thin, in order to make the influence to the gate insulating film and the gate electrode as the under layer of the amorphous silicon film as little as possible, annealing is carried out by an excimer laser having a wavelength of 308 nm or 254 nm. Alternatively, lamp heating using the principle of rapid thermal anneal is preferable.
In order to carry out partial crystallization, in the case of a laser, the shape of a laser beam is made linear by an optical system, and the portion in the lengthwise direction of the substrate is irradiated at once or in a divided manner to be crystallized. Then the substrate is rotated by 90xc2x0, and the portion in the widthwise direction of the substrate is irradiated at once or in a divided manner to be crystallized. Although it is possible to scan the optical system of the laser by using a galvanometer or the like without rotating the substrate, since the optical system taking the aberration into consideration becomes complicated because of the short wavelength, it is preferable to fix the laser beam and to move the substrate instead.
In the case where partial crystallization is made by lamp annealing, the portion on the substrate where crystallization is not carried out is covered with a mask of metal or ceramics, and the lamp irradiates the entire surface of the substrate. According to experiments by the present inventor, when a metal mask was repeatedly used many times, there occurred such a problem that the mask was bent. Thus, ceramics was used as the mask. However, when a mask is not continuously used, a metal mask may be used.
In the case of crystallization, it is preferable to carry out the crystallization in vacuum or an inert gas than in the atmosphere. In the present invention, after forming the amorphous silicon, the substrate is transferred into a low pressure chamber for crystallization without exposing the substrate to the atmosphere, and crystallization is carried out in the vacuum state.
After forming the amorphous silicon and the polysilicon on the same substrate, source and drain regions are formed. There are some methods of forming the regions.
According to a first method, an insulating film for an etching stopper is provided on an upper portion of a channel forming region. The insulating film for the etching stopper is formed on the entire surface of the substrate where partial crystallization is completed. The film is also formed on the amorphous silicon and the crystallized polysilicon without exposing the substrate to the atmosphere. As the material of the film, any material may be used as long as the insulating film has a high selective ratio of etching to the silicon, and silicon nitride, silicon oxide, silicon nitride oxide may be used.
When the insulating film for the etching stopper is formed so that an area thereof is smaller than an area of an upper portion of the gate electrode, the area of the etching stopper is equivalent to the area of the channel. After forming the insulating film, the surfaces of the amorphous silicon and polysilicon, which becomes the source and drain regions, are exposed, and the channel forming portion is covered with the etching stopper.
Next, an amorphous impurity semiconductor layer which is doped with trivalent or pentavalent impurities such as phosphorous and boron, is formed on the entire surface, and a conductive layer as a wiring layer is continuously formed. Thereafter, the conductive layer and the impurity semiconductor layer are formed using the same photo mask so that they extends to an upper portion of the etching stopper and cover the source region and drain region. Thus, a silicon TFT and a polysilicon TFT are completed.
Although the amorphous silicon TFT is almost completed by the process described above, in the case of the polysilicon TFT, since the impurity semiconductor being contact with the source and drain regions is not crystalline semiconductor, if crystallization like the former partial crystallization is carried out after forming the impurity semiconductor layer, more completed TFT is made. When the present invention is applied to the AMLCD, although the amorphous silicon TFTs are only N-channel TFTs, in the case of the polysilicon TFTs, since complementary transistors are required to be formed, the impurity semiconductor film doped with boron while unnecessary portions are masked, is formed so that P-channel TFTs are formed.
According to a second method, a part of channel formation region is etched. After completing partial crystallization, a semiconductor layer doped with impurities is formed without exposing the substrate to the atmosphere, and thereafter a conductive film as a wiring layer is formed without exposing the substrate to the atmosphere.
Thereafter, the conductive film and the semiconductor layer doped with impurities are etched into the same plane shape to form a wiring region. At that time, a portion of the silicon thin film as the active layer on the gate electrode is etched, so that a channel forming region is formed. Accordingly, the film thickness of the active layer of the channel forming region is thinner than the source and drain regions.
Although the amorphous silicon TFT is almost completed by the method described above, in the case of the polysilicon TFT, since the impurity semiconductor being contact with the source and drain regions is not crystalline semiconductor, if crystallization like the former partial crystallization is carried out after forming the impurity semiconductor layer, more completed TFT is made. Although the amorphous silicon TFTs are only N-channel TFTs, in the case of the polysilicon TFTs, since complementary transistors are required to be formed, the impurity semiconductor film doped with boron while unnecessary portions are masked, is formed, so that P-channel TFTs are formed.
According to a third method, instead of forming an impurity semiconductor layer, plasma doping, ion implantation, ion doping, or the like is carried out to source and drain regions, so that the source and drain region can be formed.
Further, the polysilicon TFT can be made into an LDD structure. By forming a lightly doped drain region and a lightly doped source region having dose amounts of impurity smaller than a source region and a drain region, the LDD structure can be formed.
In the thus formed polysilicon TFTs and amorphous silicon TFTs on the same substrate, when the polysilicon TFTs are used as a driving circuit, the circuit having high frequency response characteristics can be formed, and at the same time, when the amorphous silicon TFTs are used for pixels, switching elements having high ON/OFF ratio and small OFF-state leak current can be formed. Accordingly, high quality liquid crystal display is possible. Further, since circuits can be formed on the same substrate of the cheap normal glass, the present invention has great advantages in technology.